The present invention relates to a circuit arrangement for the dynamic real time testing of a synchronous digital circuit.
Before operationally used in a system, a completely developed and realized synchronous digital circuit must be subjected not only to a static test, but also to a dynamic real time test, with the latter being used to determine the limit frequency so as to classify the circuit.
German Offenlegungsschrift [laid-open Patent Application] No. 2,538,651 discloses a method for testing a digital electronic circuit using signature analysis techniques and a circuit arrangement for implementing the method, wherein the digital electronic circuit is clocked by a clock pulse generator and emits a digital signal at a measuring point. The emitted digital signal is processed by means of an identification generator device at defined, equal-length time periods to form a test signature pattern which is compared with a desired bit pattern.
However, the foregoing circuit arrangement operates only at a clock pulse frequency up to approximately 50 MHz. With clock pulse frequencies higher than that, such a circuit arrangement produces erroneous indications.